Senior Embedded Security Software Engineer - CPU / Platform Software Team
Job Description
We are seeking highly skilled Software Engineers to join our team and help us build Software Components for our RISC-V-based CPUs, Platforms. As a Senior Embedded Security Software Engineer at MIPS, you will play a crucial role in enhancing the security of our processor architectures and enabling our customers to build secure embedded systems.You will be a key contributor to our product security strategy, working closely with architecture, hardware, and software engineering teams to ensure robust security features are integrated into our processors and supporting software. This role provides a unique opportunity to work on the foundational security aspects of embedded systems at the processor and SoC level.
This is an exciting opportunity to work in a dynamic environment, involving interaction with many of MIPS`s engineering teams, including systems, architecture, hardware and software as we build both hardware and software grounds up! Our aim is to build to build software components that not only allow our IP solutions to be well tested but also provide our customers and partners with a robust repository of software to kick start their assimilation of MIPS IP and allowing them to obtain the highest performance from hardware and software synergy.
Responsibilities- Design, develop, and implement secure bootloaders (Boot ROM and Secondary Bootloaders) for MIPS processor architectures, adhering to industry cybersecurity standards and best practices.
- Develop and integrate drivers for security-critical peripherals such as cryptographic engines, memory protection units (MPUs), and other security-related hardware blocks.
- Implement secure boot flows, including key provisioning, code signing, secure firmware updates, and rollback mechanisms, creating reference implementations and documentation to facilitate customer adoption.
- Conduct threat modeling and vulnerability assessments of embedded systems based on MIPS processors, identifying potential security weaknesses at the hardware and software levels.
- Perform static and dynamic code analysis, unit testing, integration testing, penetration testing, and fuzz testing to ensure code quality and security.
- Develop and maintain automated test frameworks and scripts for security validation.
- Optimize embedded software for memory footprint, performance, and security, considering the specific characteristics of MIPS processor architectures.
- Collaborate closely with Architecture, Hardware, and Software teams to influence processor design and implement security features at the hardware, firmware interface.
- Provide technical support and guidance to customers implementing secure boot and other security features on MIPS-based platforms.
- Contribute to the development and maintenance of security guidelines, best practices, and secure coding standards for MIPS processors.
- Bachelor`s or Master`s degree in Electrical Engineering, Electronics Engineering, Computer Science, or a related field.
- 5+ years of industry experience in embedded security software development, preferably with experience in processor-level security.
- Deep understanding of embedded systems architecture, hardware interfaces (SPI, I2C, USB, UART, JTAG), and debugging tools (oscilloscope, logic analyzers).
- Strong proficiency in embedded C, C++ and assembly programming, with experience in bare-metal and RTOS-based development.
- Experience with CPU security, TrustZone, TFM
- Solid understanding of security concepts (confidentiality, integrity, authenticity), cryptographic algorithms, and hardware security modules (HSMs).
- Experience with secure coding practices (e.g., CERT C) and security testing methodologies.
- Experience with embedded software debugging and device lifecycle management.
- Proficiency with build systems (Make, CMake) and scripting languages (Python or Perl).
- Experience with CI/CD pipelines and version control systems (e.g., Git).
- Familiarity with RISC-V ISA. Knowledge of different Instruction Set Architectures (e.g. x86_64, ARM64)
- Experience with open-source security projects such as OpenTitan or MCUBoot.
- Experience with Trusted Execution Environments (TEEs).
- Knowledge of formal verification techniques for hardware and software security.
- Contributions to security-related publications or open-source projects.
Here's What You Can Expect From Us
At MIPS, you'll be a member of a fast-growing team of technologists that are creating the industry's highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure you'll be able to understand and have an impact on the bigger picture.A great deal of autonomy, with support from some of the industry's most experienced CPU engineers. An unlimited growth path with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers.
At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!
More About Us
MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products.
Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing.Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions.